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Useful Links

Repositories:
- Readout Board PCB - https://gitlab.cern.ch/cms-etl-electronics/readout-board-pcb
- RB+Module Test Firmware - https://gitlab.cern.ch/cms-etl-electronics/module_test_fw
- RB+Module Test Software - https://gitlab.cern.ch/cms-etl-electronics/module_test_sw
- ETROC Emulator - https://gitlab.cern.ch/cms-etl-electronics/etroc-emulator
- ScopeHandler - https://github.com/CMS-MTD/ScopeHandler/tree/master
- TimingDAQ - https://github.com/CMS-MTD/TimingDAQ
- ETROC2 Test Stand - https://github.com/arhayrap/ETROC2_Test_Stand/tree/main
TDR - CMS-TDR-020
Flipped Module Proposal
ETROC v1 Users Manual
ETROC v2 Users Manual
ETROC Pinout / Bonding 2022/11/16 [Production]
- ETROC2 Pinout
- ETROC2 Bonding Diagram
LpGBT v1 Manual: LpGBT v1 Manual
LpGBT v0 Manual: LpGBT v0 Manual
GBT-SCA Manual: GBT-SCA Manual
BPOL12 Datasheet: BPOL12 v6
LINPOL12 Datasheet: LinPOL12V
VTRX+ Application Note: VTRxPlusApplicationNote.pdf
VTRX+ Specification: VTRxPlus_spec_v2.4.pdf
VTRX+ v1.2 LDD Specs: VLplus_quadLDD_spec_v1.2_prototypes.pdf
VTRX+ Receiver Saturation and mitigation: Application Note
CMS MTD Endcap Timing Layer Sub-Project Electronics Documentation: twiki
- Readout Board: twiki schematic v1 schematic v2 schematic v3 (MUX64 board)
- Power board: twiki schematic pdf
- Module v0: twiki schematic pdf
- Module v0b: twiki schematic pdf
- Module v1: schematic pdf
- RBv2 to Module v1 adapter: schematic pdf

Useful Presentations

Power Board / LV

2020/03/09 - ETL LV powering scheme (Natalia K.)
2019/05/13 - Update on Power board and Patch Panel-0 (S. Los)
2020/08/31 - Power Board Status (S. Los)
2021/05/17 - Power Board Status (S. Los)
2021/09/20 - Update on power board v1 (S. Los)
2021/10/18 - Next steps for the PB design (S. Los)
2021/10/25 - DC-DC Converter(Output Voltage Ripple Edition) (S. Los)
2021/10/28 - Update on LV powering scheme and Services (Natalia K.)
2021/12/21 - Connection Between Readout and Power Boards (S. Los)
2022/03/02 - A Possible Cross-Section for Flex Cable Solution Along the RBs (S. Los)
2022/05/26 - Power board mounting (S. Los)
2022/07/08 - Power supplies (F. Guerts)
2022/09/12 - Power board update (S. Los
2022/10/17 - Power Board flex options (S. Los)
2022/10/24 - Power Board update & Single Board Design (S. Los)

Readout Board

2020/04/05 - ETL Readout Board v2 (Andy P.)
2020/07/13 - Readout Board Interfaces (Andy P.)
2020/08/31 - Readout Board v2 Update (Andy P.)
2021/03/01 - Readout Board v2 Update (Andy P.)
2021/08/30 - RB Plans Update (Andy P.)
2021/08/30 - RB Testing (Chris McMahon)
2022/03/28 - Readout Board v2 Update (Andy/Daniel)
2022/07/08 - ETL SH Developments (Daniel S.)
2022/10/10 - Testing the RB with the Emulator (S.Y. Jeon)
2022/10/10 - RB Monitoring Needs (D. Spitzbart)

ETROC

2020/06/02 - ETROC Power consumption (Ted L.)
2020/07/20 - The SW Array Scheme of ETROC2 Readout (J. Wu)
2020/09/14 - ETROC Status (Ted L.)
2020/09/28 - Delay Line Based TDC:From ASIC to FPGA and Back to ASIC (J. Wu)
2021/06/04 - A Low-Power Time-to-Digital Converter for the CMS Endcap Timing Layer (ETL) Upgrade
2021/07/13 - ETROC Status (Ted L.)
2021/08/30 - ETROC Update (Ted L.)
2021/10/06 - ETROC Review
2021/10/25 - ETROC2 Bump Bonding Option (Q. Sun)
2022/01/31 - Revisiting the System Interface of ETROC2 before it is Finalized (Andy L.)
2022/01/31 - ETROC Update (Ted L.)
2022/03/14 - Pinout Update (Quan S.)
2022/03/15 - ETROC Update (Ted L.)
2022/03/28 - ETROC Grounding (S. Los)
2022/03/28 - ETROC Schedule Update (Ted L.)
2022/05/23 - ETROC pinout & update (Ted L.)
2022/06/02 - ETROC FAQ for Andrew (Quan S.)
2022/07/08 - ETROC2 key Features: from user point of view (Ted L.)
2022/07/22 - ETROC2 Submission Review (ETROC team)
2022/09/12 - ETROC2 Status Update (Ted L.)
2022/10/07 - ETROC2 Submission Review Followup (Ted L.)
2022/10/24 - ETROC2 Upcoming Directors Review (Ted L.)
2022/12/20 - ETROC readout discussion (ETROC bandwidth) (Ted L.)
2024/01/22 - ETROC2 bump bonding and plans (Ted L.)

Module

2022/01/28 - Mockup Update (Daniel S.)
2022/02/24 - Module Assembly Update (C. Fangmeier)
2022/03/08 - New Baseline Module Design (C. Fangmeier)
2023/02/26 - Module PCB Design (A. Peck)
2023/06/19 - Module PCB v1 Design (Panos G.)
2023/11/20 - Module PCB prototyping plan (Indara S.)
2024/02/11 - Module v0b modifications for noise reduction (Sergey L.)
2024/05/13 - BV filtering discussion (Sergey L.)

Emulator

2020/04/27 - EIE Dataformat (Andy L.)
2021/05/10 - Emulator v1 Update (Andy L.)
2021/08/30 - Emulator Update (Andy L.)
2022/02/28 - Emulator Firmware v2 Update (Andy L.)
2022/07/08 - Emulator Update (J. Wu)
2022/10/20 - Emulator Features and Plans (J. Wu)

DAQ

2021/11/30 - MTD DAQ and Precision Clock Distribution (Ozgur)
2021/11/30 - ETL DAQ Testing Experiences and Plans (Chris Madrid)
2022/04/11 - MTD DAQ for ETL (Ozgur)
2022/05/23 - MDT DAQ Specifications (Ozgur)
2022/06/02 - ETL DAQ Bandwidth (Ozgur)
2022/07/08 - ETL DAQ (Ozgur)
2022/09/21 - MTD DAQ and PCD status update (Ozgur)

HPTD

2018/04/23 - Xilinx FPGA transceiver study (E. Mendes)
2018/06/26 - HPTD IP core for high-speed links using Xilinx FPGAs (E. Mendes)
2019/02/15 - Phase determinism (between reconfiguration cycles) over temperature of Silicon Labs PLLs (Si5344, Si5345, Si5395, Si5391) (E. Mendes et al)
2019/03/09 - TCLink: A Timing Compensated High-Speed Optical Link for the HL-LHC experiments (E. Mendes)
2020/01/23 - Achieving Picosecond-level Phase Stability in Timing Distribution Systems (E. Mendes)
2021/02/02 - HPTD Phase Aligner Reference Note (E. Mendes)
2022/03/25 - Discussion on phase-determinism tests
2022/03/25 - Phase Determinism Study Meeting
2022/04/07 - TClink for HGTD
2022/05/09 - News on TTC backbone Upgrade & HPTD
2022/06/27 - Phase determinism with TCLink: latest news on single hop and cascaded hops (E. Mendes)
2022/06/27 - TCLink for ATLAS LTI (P. Vichoudis)
2022/09/12 - TCLink: How much your clock phase can change between different runs? (E. Mendes)
2022/11/08 - Updates on ATLAS investigations in TCLink determinism (P. Vichoudis)
2023/12/08 - Updates in Users forum on how to correct phase jumps

BV / Sensor

2022/03/03 - Sensor Mortality Study (Ryan H.)
2022/05/16 - BV Granularity Study (Daniel S.)
2024/01/22 - Sensor QA/QC (Federico S.)
2024/01/22 - Sensor towards tender (Nicolo, Roberta)
2024/02/19 - Sensor production and test beam schedules(Roberta)

Testing

2022/06/18 - Preparing for ETROC2-based system testing (Ryan H.)
2022/09/12 - ETROC1 Beam Test at FTBF (D. Kim)
2022/09/26 - Preparing for ETROC2 Arrival (D. Spitzbart)
2022/10/10 - Lessons from ETROC1 (Chris Madrid)
2022/10/10 - Proposal for May/June 2022 Test Beam (Ryan Heller)
2022/10/24 - ETROC2 Emulator Testing Status (S.Y. Jeon)
2023/12/19 - DESY test beam introduction (F. Siviero)

Calibration

2019/01/17 - MTD time calibration (Tomasso)

Common Components

2022/09/22 - VTRx+: status and Q&A (C. Soos)
2022/10/24 - Discussion on common electronics components (I. Suarez)

Services

2022/07/06 - ETL Power Systems Discussion Session (F. Guerts)

Reviews

2021/10/06 - ETROC Review
2022/07/22 - ETROC2 Submission Review
2022/10/07 - ETROC2 Submission Review Followup
2022/10/28 - ETL 2022 Annual Review
2022/11/09 - ETROC FNAL Directors Review