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Test Stand Setup

Digital Module Test Stand Setup

Digital Module Test Stand

The adapter board attached to the digital module is necessary because the Module v1 boards have connectors that can only handle a limited number of connections and disconnections.

Powering

  • Readout Board Power
  • 9.40V
  • Module Power (Low Voltage)
  • 1.2V for ETROCs each should draw ~0.5A (in the figure we had 3 working modules so ~1.5A draw)
  • 3.3V for Module PCB
  • Fan
  • Connected with the same line as the power supply board

Emulator Test Stand Setup

Emulator Test Stand

Powering

  • Emulator power:
    • Emulators require a single 12V supply @0.5A.
    • Connector: 2510hx / refer to picture for polarity
  • Readout board power:
    • Mini power boards can be powered by simple wall-plug supply, 9V @0.4A
    • Connector: CUI Devices PP3-002A / outside is ground, inside is +
    • Expected current: 0.3A

General Test Stand Information

Each of these sections provided information for different parts used in the above test stands. NOTE some parts are relevant only for one test stand set up (ex: emulator board for the emulator test stand setup).

Use the labeling from the images in the Test Stand Set Up to find the relevant parts (if it is not labeled it is not used!).

Connecting Optical Fibers

  • Fiber connection for VTRX: The MTP - MT ferrule connection is ambiguous because the fanout can be keyed differently (the ``bump'' on pictures below). To make sure you get the connection right, power on the RB and check the light output of fiber 6 (DAQ uplink). If you see the light, it's right! If no laser light is visible, flip the orientation of the MT ferrule and try again. In general, we expect that the window should be on the same side as the bump. MTP - MT ferrule connnection
  • From MT ferrule, connect fibers 5, 6, and 7 to SFP+ cages on KCU105. There are two SFP+ cages; each takes an uplink and a downlink as shown in picture. (cable 5: trigger uplink, 6: DAQ uplink, 7: downlink) MT ferrule - KCU105 connnection
  • Attenuators: As of now, no attenuators are found to be necessary.
  • User SMA connections: Currently (FW v3.2.1) used for 40MHz clock output and external trigger input (e.g. from an oscilloscope). User SMA connectrions

Connecting the Breakout Board

The breakout board is connected the readout board to an oscilloscope using an SMA connector to measure the clock frequency. We can use it to test the jitter of the clock frequency across the test stand.

  • Expected f = 40.08MHz, T = 25ns. We want jitter (standard deviation) to be < 9ps
  • Test results: RB clock jitter has upper bound of 6.2ps RB Clock Jitter Test

The orientation of the breakout board vs. readout board is shown in the following diagram. breakout board orientation

Emulator Board

Connecting the Emulator Board

  • The red line on the ribbon cable connecting JTAGs must be on the same side as the dot on the boards.

jtag connector

  • The emulator interface boards are connected to the following elink channels:
    • emulator1: elink channels 0, 2, 20, 22. I2C bus: SDA/SCL on lpGBT
    • emulator2: elink channels 4, 6, 16, 18. I2C bus: SDA1/SCL1 on GBT-SCA
    • emulator3: elink channels 8, 10, 12, 14. I2C bus: SDA2/SCL2 on GBT-SCA

Emulator Board

Configuring the Emulator Board

  • The emulator firmware can be loaded following procedures described here.

KCU105

KCU105

Configuring a new KCU 105 eval board

The clock configuration has to be changed on a new KCU 105.

  • Connect UART port to computer.
  • Check USB serial devices.
  • screen /dev/ttyUSB0 115200, press if Main Menu does not show up automatically
    • ctrl+a, k to exit screen session

This is the main menu that should show up:

KCU105 System Controller v1.0
      - Main Menu -
-----------------------------
1. Set Programmable Clocks
2. Get Power System (PMBUS) Voltages
3. Get UltraScale FPGA System Monitor (SYSMON) Data
4. Adjust FPGA Mezzanine Card (FMC) Settings
5. Get GPIO Data
6. Get EEPROM Data
7. Configure UltraScale FPGA
Select an option

Select Set Programmable Clocks (1), which shows the next menu

1. Set KCU105  Si570    User Clock Frequency
2. Set KCU105  Si5328   MGT  Clock Frequency
3. Save    KCU105 Clock Frequency  to  EEPROM
4. Restore KCU105 Clock Frequency from EEPROM
5. View    KCU105 Saved Clocks in EEPROM
6. Set KCU105 Clock Restore Options
7. Read KCU105 Si570    User Clock Frequency
8. Read KCU105 Si5328   MGT  Clock Frequency
0. Return to Main Menu
Select an option
  • Set KCU105 Si570 User clock frequency (1), 320.64MHz
  • Save (3) -> (1) -> (0)
  • To confirm view with (5)

we also need to Enable KCU105 Si570 Automatic Restore at Power-Up/Reset:

  • Set KCU105 Clock Restore Options (6)
  • Select option (2)
  • Return to Clock Menu (0)

For reference: issue on gitlab.

KCU105 Loading Firmware

  • The KCU105 firmware can be loaded following procedures described here.

KCU105 Network Configuration

Setting the board IP address
  • The IP address of the board is set by a 4 bit switch SW12. The 4 bit switch is interpreted as a 4 bit offset which is added to a base IP address (192.168.0.10+offset). and a MAC of 00_08_20_83_53_00+offset. For multiple readout boards on the same network please ensure that the IP addresses are unique.
    • For example, a setting of 0 will result in 192.168.0.10 and MAC=00_08_20_83_53_00.
    • A setting of 5 will result in 192.168.0.15 and MAC=00_08_20_83_53_05.

IPbus software

Refer to this documentation for IPbus software installation.